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by Edward Solari
No
Longer Available.
This reference
provides authoritative and detailed timing specifications
for the ISA and EISA buses. Provided are hundreds of
diagrams and tables that contain all the timing
information relative to both system board and add-on card
design. The specifications covered are consistent with,
and improve upon, the IEEE P996 specs for the AT bus and
the Rev 3.12 specification for the EISA bus.
Book Details:
Publisher: Annabooks/Rtc Books (September 1, 1992)
Hardcover: 496 pages
Language: English
ISBN-10: 0929392159
ISBN-13: 978-0929392158
Product Number: AB106
Table of Contents:
- Architectural Overview
- Memory and I/O Address Space
- Generic Bus Cycles
- Interation Among ISA, E-ISA, and EISA Add-On Cards
and Platform Resources
- Signal Line Definition
- Bus Access Cycles
- DMA Transfer Bus Cycles
- Refresh Cycles
- Arbitration Cycles
- Bus Integrity
- Performance
- Configuration Space
- Power and Initialization
- Mechanical Notes
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